In the consumer market, target applications can vary over a wide range. These applications can range from low-cost video telephones to high-end electronic products with built-in video instructions.
Unlike other compression ICs that consume silicon area with direct and inverse cosine-transform circuits for intraframe or interframe processing and motion prediction, the 7710 performs frame-based compression. Each line within a frame is stored and compressed on a line-by-line basis. Moreover, the chip architecture uses minimal pipelining.
As a result, the processor requires just 128 kbytes or more of video RAM (VRAM). Its I/O latency time in less than 100 [micro-s]. A patented on-chip compression algorithm, contained in compression-code tables, is simpler than the proposed Joint Photography Experts Group (JPEG) standard. With…
28 Feb 2016